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Technical Recruiter
Normal Computing · Palo Alto, California, United States
$160k–210k
67 days ago
♡
Research Engineer, Domain Scaling
Normal Computing · New York City, New York, USA
$200k–400k
153 days ago
♡
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Hardware Engineer, RTL
Normal Computing · New York City, New York, USA
Pay
$200k–400k
Setting
Hybrid
NORMAL COMPUTING | BUILD WITH US
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
THE ROLE
As an RTL Design Engineer at Normal, you will design and verify the digital logic at the heart of Normal's thermodynamic hardware. This work sits at the intersection of classical ASIC design, novel computing architectures, and a development environment where the hardware and the algorithms are built together, not in sequence.
You will own RTL from microarchitecture to tapeout: writing microarchitecture specifications, creating synthesizable SystemVerilog, working with design verification engineers fully test the design using conventional and formal methods, and working closely with physical design to make sure the design meets area and timing constraints. Because Normal's chips are not standard accelerators, the RTL engineer here is closer to first-principles decisions than at a larger company. You will be shaping architecture, not just implementing it.
This is a role for an engineer who collaborates effectively across teams, including architecture, verification and physical design. The strongest candidates have taped out silicon, written RTL and helped close coverage, and are comfortable working in an environment where the specification is still being developed in parallel.
WHAT YOU WILL OWN
- RTL Design: Write and own synthesizable RTL in SystemVerilog across blocks ranging from datapath logic to control and memory interfaces.
- Microarchitecture: Work with architecture to translate high-level specifications into implementable microarchitectures.
- Verification: Work closely with the verification team to review verification plans, assist on debug, and become a partner in closing coverage.
- Physical Design Collaboration: Collaborate with physical design on timing closure, floorplanning constraints, and DFT.
- Design Reviews: Participate in design reviews and contribute to architecture decisions, not just implementation.
- Tapeout & Bring-up: Support tapeout preparation, integration, and post-silicon bring-up as needed.
WHAT MAKES YOU A GREAT FIT
- Hands-on experience writing production RTL in SystemVerilog and closing it through synthesis and place-and-route
- Experience in closing coverage to a high level
- At least one tapeout in your background, from any node and any company size
- Experience working on datapaths, pipelines, or custom logic where the microarchitecture was not fully specified upfront
- Strong debugging instincts across simulation, waveforms, and formal counterexamples
- Ability to work directly with architects and physical designers without needing a large intermediary layer
- Industry experience in ASIC or SoC design
BONUS POINTS
- Experience at an AI chip company where design and verification were tightly coupled
- Open-source RTL contributions to projects like Chipyard, OpenTitan, or CVA6
- Familiarity with RISC-V or other open ISAs
- Experience with AI-assisted RTL or EDA tooling in your design workflow
- Exposure to physical design constraints, floorplanning, or timing-driven RTL development
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
Hardware Engineer, FPGA
Normal Computing · New York City, New York, USA
Pay
$200k–400k
Setting
Hybrid
NORMAL COMPUTING | BUILD WITH US
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
THE ROLE
Validating conventional silicon is a solved discipline. Validating silicon that computes with noise is not, and you will be the one who figures out how. As our FPGA Design Engineer, you will own the bridge between RTL and physical silicon: bringing our physics-inspired ASIC designs to life on FPGA platforms for pre-silicon validation and early software development, and building the test infrastructure for post-silicon bring-up and characterization. Your scope spans the entire FPGA lifecycle: selecting hardware platforms, implementing complex RTL, debugging in the lab, and writing the software that drives it all, working daily with our silicon, EDA, and research teams.
WHAT YOU WILL OWN
- FPGA Platform Ownership: Lead the selection, procurement, and bring-up of FPGA prototyping platforms (e.g., HAPS, VCU118/VPK180-class boards, or custom hardware) for pre-silicon RTL validation and software development.
- RTL Implementation: Adapt and implement complex ASIC RTL onto FPGA targets, including multi-clock-domain architectures, CDC bridges, and timing closure on dense designs.
- IP Integration: Integrate in-house designs with third-party and vendor IP; serve as the expert on the AMD/Xilinx ecosystem (Vivado IP Integrator, transceivers, memory controllers).
- High-Speed Interfaces: Design, implement, and validate high-speed I/O with a focus on PCIe: our accelerators ship as PCIe cards in standard servers.
- Post-Silicon Validation: Build FPGA-based "tester" designs for silicon bring-up, device characterization, and automated test environments.
- Hardware-Software Stack: Develop the software layer around the hardware: Python/C++ hardware abstraction, register-map generation, and automated build and regression flows.
- Lab Debug: Root-cause complex timing and functional issues in real time using ILA/Vivado Analyzer, oscilloscopes, logic analyzers, and BER/eye-diagram characterization of high-speed links.
WHAT MAKES YOU A GREAT FIT
- Proven industry experience taking FPGA designs from RTL through timing closure to validated hardware, ideally in an ASIC prototyping, emulation, or high-growth hardware environment.
- Expert-level SystemVerilog and/or VHDL for synthesis, with deep proficiency in Xilinx Vivado (synthesis, place & route, timing closure, IP catalog).
- Hands-on experience implementing and debugging PCIe, plus AXI/AHB, SPI, UART, JTAG, and other common interfaces.
- Strong Python for automation, test, and build tooling.
- Strong board-level bring-up and lab debugging skills on real hardware.
- Startup mindset: you work independently, pivot quickly, and run at ambiguous problems that span hardware, software, and physics.
BONUS POINTS
- Verification frameworks like Cocotb or UVM
- Experience deploying ML models to FPGAs (hls4ml, FINN, or custom NN-to-RTL flows), or building real-time, sub-microsecond signal processing pipelines.
- Mixed-signal ASIC exposure: digital front-ends, ADC/DAC interfaces, or analog compute.
- SERDES tuning and signal integrity fundamentals.
- CI/CD for hardware (GitLab CI, Docker-based build and test).
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
Technical Recruiter
Normal Computing · Palo Alto, California, United States
Pay
$160k–210k
Setting
Hybrid
NORMAL COMPUTING | BUILD WITH US
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, San Francisco, London, Copenhagen, and Pangyo.
THE ROLE
Recruiting for Normal is a specialist's craft several times over. AI/ML researchers, DV and silicon engineers, and forward-deployed engineers are each small candidate pools where every strong person is fielding multiple offers — and the people you're hunting can smell a recruiter who doesn't speak their language.
As our Technical Recruiter, you will own full-cycle recruiting across Normal's roles: AI/ML research and engineering, silicon (architects, RTL and DV engineers, physical design, bring-up), forward-deployed engineering, and the G&A roles that keep a scaling company running.
You will partner directly with hiring managers who are themselves deep in their craft, source candidates who aren't looking, and close people who have every option. This is a seat on a small talent team where your searches directly determine whether a chip tapes out and a deployment ships on schedule.
WHAT YOU'LL OWN
- Full-Cycle Recruiting: Manage the end-to-end recruitment process across AI/ML, silicon and ASIC, EDA software, and forward-deployed engineering roles from intake through close, flexing to G&A searches as priorities shift.
- Strategic Sourcing: Identify and engage top-tier talent across AI research, unconventional silicon architecture, design verification, and forward-deployed engineering: people who are rarely on the market and need a reason to talk.
- Hiring Manager Partnership: Act as a strategic partner to hiring managers across engineering, research, and business functions, aligning on candidate qualifications, technical bars, and calibration as searches evolve.
- Process Discipline: Run the WHO Method for talent calibration and maintain high-efficiency interview loops, targeting 4-5 rounds maximum so great candidates don't die in process.
- ATS Ownership: Maintain impeccable data hygiene and pipeline flow in Ashby: clean stages, honest statuses, reporting the team can trust.
- Brand Ambassadorship: Represent Normal Computing at industry events like DAC, engaging specialized candidates in the rooms where they actually gather.
WHAT MAKES YOU A GREAT FIT
- 5+ years of full-cycle technical recruiting, including direct experience recruiting AI/ML, software, or semiconductor engineers: research, RTL, DV, physical design, architecture, or adjacent roles
- A track record of closing senior engineers against competing offers: you know how to sell equity, risk, and conviction, not just a comp number
- Technical literacy across the deep-tech landscape: AI/ML, EDA software, AI silicon, and custom ASIC development — you can hold a credible intake conversation with a chip architect or an AI researcher
- Advanced fluency in Ashby (or comparable ATS) for candidate tracking, reporting, and process automation
- Operational excellence: low ego, comfortable with ambiguity, and able to move real work forward at the volume of a scaling startup
BONUS POINTS
- Experience recruiting G&A and business operations roles alongside technical searches
- Experience recruiting for unconventional computing or physics-based hardware architectures
- Previous experience in a high-growth venture-backed startup, semiconductor company, or research lab
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
Software Engineer, Backend
Normal Computing · New York City, New York, USA
Pay
$200k–400k
Setting
Hybrid
Infrastructure Software Engineer
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
Forward Deployed Engineer
Normal Computing · New York City, New York, USA
Pay
$200k–400k
Setting
Hybrid
NORMAL COMPUTING | BUILD WITH US
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, San Francisco, London, Copenhagen, and Pangyo.
THE ROLE
The cost of taping out silicon is enormous, and the complexity of verification makes multiple tapeouts hard to avoid. Normal EDA accelerates this work as an AI platform for collaborative silicon engineering: a single source of truth across the chip lifecycle, learning continuously from the teams that use it. As a Forward Deployed Engineer, you own our EDA system inside a customer's environment. Embedded directly with our partners, you adapt our platform to their data, workflows, and design challenges, working alongside our account executive and a deployment strategist to make the deployment a success.
You thrive as a problem-solver and take pride in winning over customers along with the rest of your team. You will be debugging distributed systems, building new product features, post-training models, and working in various silicon-native languages such as SystemVerilog. Note that many different kinds of candidates could be well-qualified for this role, even with non-overlapping expertise (e.g. ML background vs. silicon background).
WHAT YOU WILL OWN
- Production Problem-Solving: Diagnose issues in our system, the model, the data, or the workflow. Work deep in both Normal's systems and the customer's environment to resolve them, and close the loop with their engineers.
- Evaluation Against Reality: Design and run evals against real customer workflows, validating generated artifacts against their specifications so model behavior holds up in production.
- Platform Integration: Integrate the platform with each customer's data, design flows, and tooling, working with their production codebases and against their existing infrastructure.
- Customer Signal: Embedded with silicon design teams, translate their constraints into model and platform requirements, and carry that signal back to Normal's research, product, and platform teams to shape what gets built next.
- Continual Learning: Post-train Normal's models on-prem on proprietary customer data and trajectories to customize to their workflow, tooling, and style preferences. Build the continual-learning loops that turn their engineers' feedback into system knowledge, so model quality compounds across the engagement.
- Judgment Ahead of Playbook: Make the calls on what to build, what to skip, and when to push back on a request that would compromise what ships. Codify what works into patterns that raise the floor for every engagement after yours.
WHAT MAKES YOU A GREAT FIT
- Great at problem-solving and tracking down issues wherever they are in the stack
- Strong software engineering fundamentals: proficient in Python, comfortable in production codebases, distributed-systems literate
- Hands-on experience with the modern ML stack: prompt engineering, fine-tuning, evals, agentic patterns, model deployment
- Willingness and ability to go deep on semiconductor verification workflows. You will spend significant time inside UVM testbenches, SystemVerilog codebases, and design specifications. Prior experience is a strong advantage, but what matters is whether you can build fluency fast and earn credibility with verification engineers
- An ability to ship ML systems inside customer or production environments where model behavior had to hold up against real-world data
- Calm in ambiguity: you make good decisions with incomplete information, and you know when to act and when to ask
- Comfortable with travel when needed; anywhere between a few days for customer meetings and a few months for longer-term customer projects
BONUS POINTS
- Direct experience with EDA, semiconductor design flows, verification workflows (UVM, SystemVerilog, coverage-driven verification), or other areas of silicon engineering
- Built or led an FDE or customer-deployment function from the ground up at an earlier-stage company
- Open-source contributions or publications in AI or ML venues
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
Research Engineer, Domain Scaling
Normal Computing · New York City, New York, USA
Pay
$200k–400k
Setting
Hybrid
NORMAL COMPUTING | BUILD WITH US
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
THE ROLE
The Domain Scaling team has the goal of making Normal’s Agents world-class at anything Chip-Engineering and EDA-related, UVM, debugging, analog, lean formalization, materials-aware optimization, etc. This is a unique role that combines executing directly on applied research and data sourcing (real-world and synthetic) to improve our models.
You'll own the end-to-end process of creating RL environments for new capabilities: identifying high-value tasks, designing reward signals, managing vendor relationships, and measuring impact on model performance.
WHAT YOU WILL OWN
- Own the data strategy for knowledge work verticals end-to-end, from task sourcing through RL training
- Build and manage relationships with external vendors, including outreach, evaluation of data quality, and reward design
- Collaborate with domain experts to design data pipelines and evaluations
- Explore novel ways of creating RL environments for high-value tasks
- Develop and improve QA frameworks to catch reward hacking and ensure environment quality
- Run generalization experiments to measure how data strategy changes improve model capabilities
- Partner with other AI researchers and product teams to translate capability goals into training environments, evals, and real product features
WHAT MAKES YOU A GREAT FIT
- Have experience with post-training large language models for specific domains or real-world use cases
- Have experience with reinforcement learning, reward design, or training data curation for LLMs
- Are comfortable managing technical vendor relationships and iterating quickly on feedback
- Find value in reading through datasets to understand them and spot issues
- Have strong cross-functional collaboration skills
- Are passionate about making AI more useful for chip development and recursive hardware self-improvement
- Are excited about a role that includes a combination of applied research and hands-on data work
BONUS POINTS
- Have experience training production ML systems
- Have experience designing evals or benchmarks for LLMs
- Have domain expertise in a vertical where we would like to make our models more useful
- Have experience working with external vendors or technical partners
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
AI Research Engineer
Normal Computing · New York City, New York, USA
Pay
$200k–400k
Setting
Hybrid
NORMAL COMPUTING | BUILD WITH US
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, San Francisco, London, Copenhagen, and Pangyo.
THE ROLE
We’re hiring an AI Research Engineer to push the frontier of agentic LLMs and reinforcement learning for our agentic code generation tool. You’ll design and run experiments, build agents, curate datasets from complex technical documents (e.g., chip specifications), and create rigorous evaluations. You’ll write production‑quality research code and work closely with engineering to ship improvements to customers. Leadership not required—impact through research and building is.
WHAT YOU WILL OWN
- Design and implement multi‑agent and RL approaches for agentic code generation and tool‑use.
- Build research prototypes that integrate with our agentic code generation tool; collaborate to productionize wins.
- Create evaluation suites: task specs, pass/fail checkers, coverage, cost/latency dashboards.
- Acquire and curate datasets from PDFs/logs/tables; generate synthetic data where appropriate; maintain data cards and licensing.
- Analyze experiments with disciplined ablations; document results and decisions.
- Stay current on LLM agents, RL (offline/online, RLHF/RLAIF), constrained decoding, and program synthesis.
WHAT MAKES YOU A GREAT FIT
- PhD in CS/AI/ML (or equivalent research experience) with publications ideally in multi‑agent RL, agentic AI, or RL for language/code.
- Strong Python and ML framework experience (PyTorch preferred; JAX/HF a plus).
- Demonstrated ability to turn research into working systems; reproducibility mindset (tests, seeds, configs, logging).
- Experience designing eval harnesses and success metrics for sequential/agentic tasks.
- Comfortable with data acquisition/curation from documents/logs; good instincts about data quality and licenses.
- Clear communicator who partners well with engineers.
BONUS POINTS
- Research on program synthesis/codegen, constrained decoding, or execution‑based rewards.
- Experience with offline RL from tool traces or human corrections.
- Open‑source contributions (e.g., CleanRL, RLlib, AutoGen, LangGraph, CrewAI, Transformers).
- Familiarity with semiconductor/chip domains or other complex technical specs.
- Track record of shipping research to production and measuring impact.
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
AI Engineer
Normal Computing · New York City, New York, USA
Pay
$200k–400k
Setting
Hybrid
Staff AI Engineer
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
Design Verification Engineer
Normal Computing · New York City, New York, USA
Pay
$110k–205k
Setting
Hybrid
NORMAL COMPUTING | BUILD WITH US
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, San Francisco, London, Copenhagen, and Pangyo.
THE ROLE
As a Design Verification Engineer at Normal, you will verify our own physics-inspired ASICs on the road to tapeout, and set the quality bar for what our AI learns: reviewing generated verification collateral and shaping the standards our models train against. From time to time, you may also be tapped to support a customer deployment alongside our forward-deployed team, where your verification credibility helps our AI platform land inside real DV flows. The through-line is your DV expertise, applied to silicon that computes differently than anything you've verified before, and to the AI that is changing how verification gets done. This is a seat for a verification engineer who wants their craft to compound rather than repeat.
WHAT YOU WILL OWN
- Thermodynamic ASIC Verification: Own design verification for Normal's internal silicon: testbench environments, assertions, and coverage from design documents through functional coverage and closure, supporting the program to tapeout.
- AI Product Refinement: Review AI-generated verification collateral to shape product strategy and tool usability in collaboration with the ML and product teams.
- Data Quality Bar: Set the quality standard for verification training data: define rubrics, curate golden examples, and partner with our Data team, who own the pipelines, so our models learn from verification artifacts a real DV engineer would sign off on.
- Deployment Support: When needed, support customer engagements alongside our forward-deployed team: validating AI-generated collateral against real customer specifications and lending DV credibility to deployments.
- Tooling: Set up and evaluate EDA tools, ensuring usability and effective deployment on shared computing resources internally and in customer environments.
WHAT MAKES YOU A GREAT FIT
- 5+ years of experience in digital verification at a major semiconductor or EDA tool company
- Advanced proficiency in SystemVerilog, UVM methodology, and EDA verification tools (vManager, Xcelium, Jasper), with strong Python or Perl scripting
- Proven expertise in end-to-end design verification, including test plan creation, stimulus generation, and feature extraction
- Willingness to occasionally support customer-facing deployment work, including some travel
- Excellent written and spoken communication skills: you can hold the room with a customer's verification lead as credibly as you hold a debug session
BONUS POINTS
- Experience in a customer-facing, field-application, or forward-deployed engineering role at a semiconductor or EDA company
- Hands-on use of LLMs or agentic tools in verification workflows
- Exposure to analog, mixed-signal, or unconventional compute verification
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
Software Engineer, Product
Normal Computing · New York City, New York, USA
Pay
$200k–400k
Setting
Hybrid
NORMAL COMPUTING | BUILD WITH US
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
THE ROLE
As an AI Product Engineer at Normal, you will build AI-native products and workflows for semiconductor engineers. This role sits at the intersection of product engineering, AI systems, and developer tooling. You'll ship real improvements to hardware teams who want to design and verify chips more efficiently, while pushing the boundaries of what's possible in AI for engineering through innovations in interface and workflow design, data modeling, and harness engineering.
WHAT YOU WILL OWN
- UX & AX: Architect interfaces and workflows that make highly technical systems intuitive and usable for chip engineers, as well as the agentic system they use.
- Partnership: Partner closely with AI engineers, researchers, hardware engineers, and users to turn ambiguous workflow problems into clear requirements, explicit system behaviors, evaluation criteria, and working product features.
- End to End Product: Understand the user problem and define the workflow through implementation, deployment, evaluation, and iteration across frontend, backend, data, and AI systems.
- Judgment: Design and build product experiences for complex engineering workflows, taking them from initial prototype through the final layers of usability, reliability, performance, and polish required for production adoption.
- Raise the Quality Bar: Identify subtle workflow, UX, and architectural weaknesses that make a system merely functional rather than genuinely effective.
- AI-Native Execution: Use AI systems to accelerate implementation, exploration, testing, and analysis while maintaining clear ownership of requirements, verification, and final quality.
WHAT MAKES YOU A GREAT FIT
- 5+ years of experience building and shipping full stack products, ideally in fast-moving startup or zero-to-one environments
- Strong proficiency in TypeScript and React, with deep understanding of modern frontend architecture and how web technologies work
- Experience building backend systems in Python, Node.js or other popular languages, with the ability and desire to contribute across the stack
- A high bar for product and engineering quality, with the ability to identify subtle UX regressions, incomplete edge-case handling, and architectural choices that create long-term maintenance costs.
- Effective in ambiguous environments: you proactively reduce uncertainty, identify the decisions that matter, and turn evolving product direction into concrete, testable plans.
- Reliable, resourceful, and execution-oriented: you deliver on commitments, adapt quickly, and maintain a high standard for quality
- Experience building AI-powered products, working with LLMs, or collaborating closely with ML teams
BONUS POINTS
- Meaningful experience working within the semiconductor industry or building software for hardware engineering workflows
- Experience building developer tools, workflow systems, IDE extensions, or highly technical internal or business-facing products
- Familiarity with harness engineering, orchestration systems, or evaluation tooling
- Experience with visual design or building polished, user-centric interfaces
- Able to become productive quickly in unfamiliar technical domains by learning the relevant concepts, vocabulary, constraints, and validation methods without requiring prior mastery of every implementation detail.
- Experience as an engineering manager or owning a product end-to-end.
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.
Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.
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