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NORMAL COMPUTING | BUILD WITH US Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, San Francisco, London, Copenhagen, and Pangyo. THE ROLE You will develop the computational methods that make AI inference run efficiently on Normal's thermodynamic hardware. The core challenge is not adapting standard GPU kernels to a new chip. It is rethinking how operations like attention, memory access, and long-context decoding behave when the underlying substrate uses stochastic analog computation in memory rather than conventional digital logic. Normal's ASICs run the heaviest operations of large model inference inside memory itself. Your job is to develop the algorithms that exploit this natively: understand what transformer and diffusion workloads are well-suited to stochastic analog execution, design numerical methods that map onto the hardware's physical dynamics, and validate them against real silicon or high-fidelity simulation. This is a co-design role. The hardware and the algorithms are developed in parallel, which means you will influence architectural decisions, not just implement against a fixed specification. The strongest candidates have a deep understanding of both large model inference and the mathematics of stochastic systems, and have built systems that run on real hardware, not just in theory. WHAT YOU WILL OWN - Algorithm Development: Develop algorithms for transformer inference workloads running on stochastic analog processing-with-memory hardware. - Software/Hardware Co-Design: Work directly with hardware and architecture teams to shape what the chip can and should compute natively. - Numerical Methods: Design numerical methods that exploit thermal noise and analog dynamics rather than working around them. - Evaluation & Benchmarks: Build evaluation frameworks and benchmarks that characterize algorithm behavior on real hardware or simulation. - Workload Translation: Translate insights about model workloads into constraints and opportunities for hardware design. - Rapid Prototyping: Prototype and iterate rapidly as hardware evolves from simulation to silicon. - Optimizing Performance: at the gate level and the algorithmic level. and algorithms (expand/review), reinforcement learning tools. WHAT MAKES YOU A GREAT FIT - Deep understanding of large model inference: attention mechanisms, KV cache, long-context decoding, memory bandwidth constraints - Experience with inference optimization: quantization, sparsity, kernel fusion, or memory-efficient attention - Familiarity with stochastic systems, probabilistic methods, numerical analysis, or analog computation - Experience implementing algorithms close to hardware, not just in high-level frameworks - Comfort reasoning from first principles about what a novel substrate can do efficiently - Track record of taking ideas from theory to working implementation on real hardware - Strong programming skills in Python and at least one systems language - Collaborative instinct and ability to work across hardware, architecture, and software teams BONUS POINTS - PhD in machine learning, applied mathematics, physics, electrical engineering, or a related field - Exposure to analog or mixed-signal systems, in-memory compute, or non-von-Neumann architectures - Experience working on hardware that did not yet exist when you joined - Publications or open-source work in efficient inference, stochastic algorithms, or novel computing Equal Employment Opportunity Statement Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com. Privacy Notice By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.

Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.

Engineering

113 days ago

Silicon Software Lead

Normal Computing · New York City, New York, USA

Pay

$200k–400k

Setting

Hybrid

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NORMAL COMPUTING | BUILD WITH US Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, San Francisco, London, Copenhagen, and Pangyo. THE ROLE Normal's ASIC computes using stochastic analog dynamics in memory, and the software layer that makes it programmable and performant for real inference workloads does not yet exist in any standard form. As our Silicon Software Lead, you will lead the team that creates it: the compiler, runtime, kernels, drivers, and hardware abstraction layer that turn our chip into a platform. You will set technical direction, stay hands-on in the stack, and co-design with hardware architects so that software constraints shape the silicon rather than arriving after it. This is a role for someone who has built software for hardware that did not exist yet, and wants to do it where the software genuinely impacts and optimizes the hardware. WHAT YOU WILL OWN - Team Leadership: Lead and grow the silicon software team spanning compiler, runtime, and systems software, staying close enough to the code to review designs and unblock hard problems directly. - Software Stack Architecture: Own the architecture of the stack from ML framework ingestion through compilation, scheduling, and memory management to execution on Normal hardware. - Software/Hardware Co-Design: Partner with silicon architects on ISA definition and the hardware abstraction layer, ensuring the chip is compilable and programmable, not just simulatable. - Runtime and Tooling: Drive development of the runtime, kernels, drivers, profiling, and debugging tools that make the hardware usable for real inference workloads. - Simulation-to-Silicon Continuity: Keep the software stack running against simulation, FPGA prototypes, and silicon as the hardware matures, so software development never waits on tapeout. - Roadmap and Hiring: Set the silicon software roadmap, define milestones against the hardware program, and hire the engineers who deliver it. WHAT MAKES YOU A GREAT FIT - Substantial experience building software stacks for accelerators or non-standard hardware targets: compilers, runtimes, kernels, or drivers - Experience leading engineers as a technical lead or manager while staying hands-on in design and code - Strong systems programming skills in C++, Rust, or equivalent, with fluency in Python - Deep understanding of ML inference workloads and the constraints that shape their execution on hardware - Experience with compiler frameworks such as MLIR or LLVM, or with inference runtimes and kernel development - Comfort building software for hardware that is still evolving, from simulation through bring-up - Track record of hiring and developing strong systems engineers BONUS POINTS - Experience taking an accelerator software stack from zero to production at a startup or new hardware program - Experience with in-memory compute, processing-in-memory, or analog hardware interfaces - Contributions to open-source compiler or runtime infrastructure - Experience with hardware-software co-design where software insights shaped ISA or architecture decisions Equal Employment Opportunity Statement Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com. Privacy Notice By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.

Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.

Engineering

113 days ago

Hardware Engineer, RTL

Normal Computing · Palo Alto, California, United States

Pay

$200k–400k

Setting

Hybrid

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NORMAL COMPUTING | BUILD WITH US Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul. THE ROLE As an RTL Design Engineer at Normal, you will design and verify the digital logic at the heart of Normal's thermodynamic hardware. This work sits at the intersection of classical ASIC design, novel computing architectures, and a development environment where the hardware and the algorithms are built together, not in sequence. You will own RTL from microarchitecture to tapeout: writing microarchitecture specifications, creating synthesizable SystemVerilog, working with design verification engineers fully test the design using conventional and formal methods, and working closely with physical design to make sure the design meets area and timing constraints. Because Normal's chips are not standard accelerators, the RTL engineer here is closer to first-principles decisions than at a larger company. You will be shaping architecture, not just implementing it. This is a role for an engineer who collaborates effectively across teams, including architecture, verification and physical design. The strongest candidates have taped out silicon, written RTL and helped close coverage, and are comfortable working in an environment where the specification is still being developed in parallel. WHAT YOU WILL OWN - RTL Design: Write and own synthesizable RTL in SystemVerilog across blocks ranging from datapath logic to control and memory interfaces. - Microarchitecture: Work with architecture to translate high-level specifications into implementable microarchitectures. - Verification: Work closely with the verification team to review verification plans, assist on debug, and become a partner in closing coverage. - Physical Design Collaboration: Collaborate with physical design on timing closure, floorplanning constraints, and DFT. - Design Reviews: Participate in design reviews and contribute to architecture decisions, not just implementation. - Tapeout & Bring-up: Support tapeout preparation, integration, and post-silicon bring-up as needed. WHAT MAKES YOU A GREAT FIT - Hands-on experience writing production RTL in SystemVerilog and closing it through synthesis and place-and-route - Experience in closing coverage to a high level - At least one tapeout in your background, from any node and any company size - Experience working on datapaths, pipelines, or custom logic where the microarchitecture was not fully specified upfront - Strong debugging instincts across simulation, waveforms, and formal counterexamples - Ability to work directly with architects and physical designers without needing a large intermediary layer - Industry experience in ASIC or SoC design BONUS POINTS - Experience at an AI chip company where design and verification were tightly coupled - Open-source RTL contributions to projects like Chipyard, OpenTitan, or CVA6 - Familiarity with RISC-V or other open ISAs - Experience with AI-assisted RTL or EDA tooling in your design workflow - Exposure to physical design constraints, floorplanning, or timing-driven RTL development Equal Employment Opportunity Statement Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com. Privacy Notice By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.

Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.

Engineering

113 days ago

Hardware Engineer, FPGA

Normal Computing · New York City, New York, USA

Pay

$250k–340k

Setting

Hybrid

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NORMAL COMPUTING | BUILD WITH US Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul. THE ROLE Validating conventional silicon is a solved discipline. Validating silicon that computes with noise is not, and you will be the one who figures out how. As our FPGA Design Engineer, you will own the bridge between RTL and physical silicon: bringing our physics-inspired ASIC designs to life on FPGA platforms for pre-silicon validation and early software development, and building the test infrastructure for post-silicon bring-up and characterization. Your scope spans the entire FPGA lifecycle: selecting hardware platforms, implementing complex RTL, debugging in the lab, and writing the software that drives it all, working daily with our silicon, EDA, and research teams. WHAT YOU WILL OWN - FPGA Platform Ownership: Lead the selection, procurement, and bring-up of FPGA prototyping platforms (e.g., HAPS, VCU118/VPK180-class boards, or custom hardware) for pre-silicon RTL validation and software development. - RTL Implementation: Adapt and implement complex ASIC RTL onto FPGA targets, including multi-clock-domain architectures, CDC bridges, and timing closure on dense designs. - IP Integration: Integrate in-house designs with third-party and vendor IP; serve as the expert on the AMD/Xilinx ecosystem (Vivado IP Integrator, transceivers, memory controllers). - High-Speed Interfaces: Design, implement, and validate high-speed I/O with a focus on PCIe: our accelerators ship as PCIe cards in standard servers. - Post-Silicon Validation: Build FPGA-based "tester" designs for silicon bring-up, device characterization, and automated test environments. - Hardware-Software Stack: Develop the software layer around the hardware: Python/C++ hardware abstraction, register-map generation, and automated build and regression flows. - Lab Debug: Root-cause complex timing and functional issues in real time using ILA/Vivado Analyzer, oscilloscopes, logic analyzers, and BER/eye-diagram characterization of high-speed links. WHAT MAKES YOU A GREAT FIT - Proven industry experience taking FPGA designs from RTL through timing closure to validated hardware, ideally in an ASIC prototyping, emulation, or high-growth hardware environment. - Expert-level SystemVerilog and/or VHDL for synthesis, with deep proficiency in Xilinx Vivado (synthesis, place & route, timing closure, IP catalog). - Hands-on experience implementing and debugging PCIe, plus AXI/AHB, SPI, UART, JTAG, and other common interfaces. - Strong Python for automation, test, and build tooling. - Strong board-level bring-up and lab debugging skills on real hardware. - Startup mindset: you work independently, pivot quickly, and run at ambiguous problems that span hardware, software, and physics. BONUS POINTS - Verification frameworks like Cocotb or UVM - Experience deploying ML models to FPGAs (hls4ml, FINN, or custom NN-to-RTL flows), or building real-time, sub-microsecond signal processing pipelines. - Mixed-signal ASIC exposure: digital front-ends, ADC/DAC interfaces, or analog compute. - SERDES tuning and signal integrity fundamentals. - CI/CD for hardware (GitLab CI, Docker-based build and test). Equal Employment Opportunity Statement Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com. Privacy Notice By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.

Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.

113 days ago

Recruiting Coordinator

Normal Computing · Palo Alto, California, United States

Pay

$110k–140k

Setting

Hybrid

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NORMAL COMPUTING | BUILD WITH US Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul. THE ROLE You will own the operational backbone of how Normal hires. As our Recruiting Coordinator, you keep every candidate moving, every interview scheduled, and every system the talent team runs on humming, from first touch to signed offer, where People Operations takes the baton. You sit at the center of the recruiting process, working directly with recruiters, hiring managers, and candidates across five offices and multiple time zones, and you work as the right hand to our Head of Talent: when he's buried, you're the person he leans on. This is a hands-on coordination role with room to grow into recruiting operations. You will run interview scheduling and coordination, keep Ashby clean and reliable as our system of record, and make sure offers, reports, and candidate communications move without friction. As the team and its systems mature, your ownership of systems and process grows with them. The work is high-volume, detail-dense, and global. Great looks like a candidate who never feels the seams, a hiring manager who always has what they need, and a recruiting operation that runs on rails. WHAT YOU'LL OWN - Interview Scheduling & Coordination: Schedule and reschedule single and multi-panel interviews across candidates, interviewers, and time zones. Hold the logistics together and treat candidate experience as something worth protecting at every touchpoint. - Ashby Administration & Reporting: Keep Ashby clean and reliable as the system of record: maintain job pipelines and interview stages, keep candidate data accurate, and produce the recurring reports the team runs on, including referral tracking, source data, and funnel metrics, with numbers that are right before they reach anyone. - Immigration Verification: When a candidate needs early visa verification, such as H-1B eligibility, pass their information to our immigration attorneys and keep the thread moving between candidate, recruiter, and counsel, handling sensitive personal data with care. Full immigration cases hand off to People Operations after the hire. - Job Posting Management: Own the mechanics of our public postings: open and close roles in Ashby, publish to job boards, refresh stale postings, and keep the careers page an accurate reflection of what we're actually hiring. - Process Support: Document processes as the team standardizes them, and use automation and AI tools wherever they make the work faster and more reliable. You leave everything better documented than you found it. - Special Projects: Support our Head of Talent directly on whatever the moment demands: research, admin, prep for leadership reviews, event logistics, or the project nobody saw coming. Range and willingness are the job. WHAT MAKES YOU A GREAT FIT - Experience in recruiting coordination or recruiting operations, ideally in a high-volume or technical hiring environment: you have owned scheduling and ATS work for a busy team and know what it takes to keep it from falling apart - Real comfort working inside an applicant tracking system: you have maintained pipelines, stages, and templates in Ashby or a comparable ATS, and you like it when the system is clean - Highly organized and relentless about detail: you track dozens of candidates, interviews, and threads at once across multiple time zones and do not let a single one drop - Proactive communication as a default: you push updates before anyone asks, flag problems while they are small, and close the loop without being chased - Comfort coordinating across time zones, including off-hours flexibility when a global candidate needs to be scheduled quickly: a great process for a candidate in Seoul looks different from one in San Francisco - Ownership and low ego: you care more about the process working than about who gets the credit, and you are as happy building a Notion guide as you are solving a last-minute scheduling scramble BONUS POINTS - Hands-on experience with Ashby specifically, including reporting and offer configuration - Experience supporting hiring in a startup or high-growth technical environment - Familiarity with the tools Normal's talent team uses day to day, including Slack, Notion, Fireflies, and Google Workspace - Experience coordinating global or APAC hiring across time zones Equal Employment Opportunity Statement Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com. Privacy Notice By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice.

Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.

Human Resources

113 days ago

Senior Technical Recruiter

Normal Computing · Palo Alto, California, United States

Pay

$165k–195k

Setting

Hybrid

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NORMAL COMPUTING | BUILD WITH US Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, San Francisco, London, Copenhagen, and Pangyo. THE ROLE Recruiting for Normal is a specialist's craft several times over. AI/ML researchers, DV and silicon engineers, and forward-deployed engineers are each small candidate pools where every strong person is fielding multiple offers — and the people you're hunting can smell a recruiter who doesn't speak their language. As our Technical Recruiter, you will own full-cycle recruiting across Normal's roles: AI/ML research and engineering, silicon (architects, RTL and DV engineers, physical design, bring-up), forward-deployed engineering, and the G&A roles that keep a scaling company running. You will partner directly with hiring managers who are themselves deep in their craft, source candidates who aren't looking, and close people who have every option. This is a seat on a small talent team where your searches directly determine whether a chip tapes out and a deployment ships on schedule. WHAT YOU'LL OWN - Full-Cycle Recruiting: Manage the end-to-end recruitment process across AI/ML, silicon and ASIC, EDA software, and forward-deployed engineering roles from intake through close, flexing to G&A searches as priorities shift. - Strategic Sourcing: Identify and engage top-tier talent across AI research, unconventional silicon architecture, design verification, and forward-deployed engineering: people who are rarely on the market and need a reason to talk. - Hiring Manager Partnership: Act as a strategic partner to hiring managers across engineering, research, and business functions, aligning on candidate qualifications, technical bars, and calibration as searches evolve. - Process Discipline: Run the WHO Method for talent calibration and maintain high-efficiency interview loops, targeting 4-5 rounds maximum so great candidates don't die in process. - ATS Ownership: Maintain impeccable data hygiene and pipeline flow in Ashby: clean stages, honest statuses, reporting the team can trust. - Brand Ambassadorship: Represent Normal Computing at industry events like DAC, engaging specialized candidates in the rooms where they actually gather. WHAT MAKES YOU A GREAT FIT - 5+ years of full-cycle technical recruiting, including direct experience recruiting AI/ML, software, or semiconductor engineers: research, RTL, DV, physical design, architecture, or adjacent roles - A track record of closing senior engineers against competing offers: you know how to sell equity, risk, and conviction, not just a comp number - Technical literacy across the deep-tech landscape: AI/ML, EDA software, AI silicon, and custom ASIC development — you can hold a credible intake conversation with a chip architect or an AI researcher - Advanced fluency in Ashby (or comparable ATS) for candidate tracking, reporting, and process automation - Operational excellence: low ego, comfortable with ambiguity, and able to move real work forward at the volume of a scaling startup BONUS POINTS - Experience recruiting G&A and business operations roles alongside technical searches - Experience recruiting for unconventional computing or physics-based hardware architectures - Previous experience in a high-growth venture-backed startup, semiconductor company, or research lab Equal Employment Opportunity Statement Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com. Privacy Notice By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.

Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.

Science

199 days ago

Research Engineer, Domain Scaling

Normal Computing · New York City, New York, USA

Pay

$200k–400k

Setting

Hybrid

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Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.

Engineering

501 days ago

Design Verification Engineer

Normal Computing · New York City, New York, USA

Pay

$110k–205k

Setting

Hybrid

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NORMAL COMPUTING | BUILD WITH US Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, San Francisco, London, Copenhagen, and Pangyo. THE ROLE As a Design Verification Engineer at Normal, you will verify our own physics-inspired ASICs on the road to tapeout, and set the quality bar for what our AI learns: reviewing generated verification collateral and shaping the standards our models train against. From time to time, you may also be tapped to support a customer deployment alongside our forward-deployed team, where your verification credibility helps our AI platform land inside real DV flows. The through-line is your DV expertise, applied to silicon that computes differently than anything you've verified before, and to the AI that is changing how verification gets done. This is a seat for a verification engineer who wants their craft to compound rather than repeat. WHAT YOU WILL OWN - Thermodynamic ASIC Verification: Own design verification for Normal's internal silicon: testbench environments, assertions, and coverage from design documents through functional coverage and closure, supporting the program to tapeout. - AI Product Refinement: Review AI-generated verification collateral to shape product strategy and tool usability in collaboration with the ML and product teams. - Data Quality Bar: Set the quality standard for verification training data: define rubrics, curate golden examples, and partner with our Data team, who own the pipelines, so our models learn from verification artifacts a real DV engineer would sign off on. - Deployment Support: When needed, support customer engagements alongside our forward-deployed team: validating AI-generated collateral against real customer specifications and lending DV credibility to deployments. - Tooling: Set up and evaluate EDA tools, ensuring usability and effective deployment on shared computing resources internally and in customer environments. WHAT MAKES YOU A GREAT FIT - 5+ years of experience in digital verification at a major semiconductor or EDA tool company - Advanced proficiency in SystemVerilog, UVM methodology, and EDA verification tools (vManager, Xcelium, Jasper), with strong Python or Perl scripting - Proven expertise in end-to-end design verification, including test plan creation, stimulus generation, and feature extraction - Willingness to occasionally support customer-facing deployment work, including some travel - Excellent written and spoken communication skills: you can hold the room with a customer's verification lead as credibly as you hold a debug session BONUS POINTS - Experience in a customer-facing, field-application, or forward-deployed engineering role at a semiconductor or EDA company - Hands-on use of LLMs or agentic tools in verification workflows - Exposure to analog, mixed-signal, or unconventional compute verification Equal Employment Opportunity Statement Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status. Accessibility Accommodations Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com. Privacy Notice By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.

Listed by Normal Computing for a position based in the United States. Employers on this board attest they are hiring domestically.

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